Adjustable Duty Cycle

The circuit shown here can be used to convert a digital input signal having any desired duty cycle into a output signal having a duty cycle that can be adjusted between 10% and 80% in steps of 10%. The circuit is built around a 74HC4017 decade Johnson counter IC. Individual pulses appear on the ten outputs (Q0–Q9) of this IC at well-defined times, depending on the number of input pulses (see the timing diagram). This characteristic is utilised in the circuit. The selected output is connected via a jumper to the Reset input (MR, pin 2) of a 74HC390 counter. A High level resets the output signals of the 74HC390 counter. Q9 of the 74HC4017 is permanently connected to the CP0 input of the counter to set the Q0 output of the 74HC390 (pin 3) High on its negative edge.

As can be seen from the timing diagram, which shows the signals for a duty cycle of 30% as an example, this produces a signal with exactly the desired duty cycle. The circuit cannot be used to produce a duty cycle of 10% (which would be equivalent to taking the signal directly from the Q0 output of the 74HC4017) or 90%. In both cases, the edges of the pulses used for the count input (CP0) and the asynchronous reset input (MR) of the 74HC390 would coincide, with the result that the output state of the 74HC390 would not be unambiguously defined. The input frequency must be ten times the desired output frequency.

If the second half of the 74HC390 is wired as a prescaler, a prescaling factor of 2, 5 or 10 can be achieved, thus allowing the ratio of the of input frequency to the output frequency to be 20, 50 or 100. If the circuit is built using components from the 74HC family, it can be operated with supply voltages in the range of 3–5 V.